1. Field
Embodiments of the invention apply to semiconductor device manufacture and, more particularly, to applying stresses to semiconductor substrates to enhance transistor performance.
2. Background
Metal Oxide Semiconductor (MOS) technology has become the overwhelming choice or electronic devices from DVD (Digital Video Disk) players to portable telephones to computers. MOS technology is primarily used to form devices such as transistors and diodes in silicon chips. Electronic circuits normally require devices that have a positive channel (PMOS) together with devices that have a negative channel (NMOS). The characteristics of PMOS and NMOS devices differ, however. For example, the performance of MOS devices can be improved by applying stresses to the MOS devices. However, PMOS and NMOS devices respond differently to these stresses.
The performance of PMOS devices can be improved by applying compression along the direction of the current flow and by applying tension across the direction of current flow. Compression along the direction of current flow (along the channel) degrades NMOS performance. By contrast, the performance of NMOS devices can be improved by applying tension along the direction of the current flow, and by applying tension across the direction of current flow. Also the impact on NMOS devices is much less than the impact on PMOS devices. Since the performance trends with applied stresses are quite different and often opposite between NMOS and PMOS, any MOS improvements through stress engineering need to strike a fine balance between NMOS and PMOS.
There are several approaches to applying uniaxial strains to particular devices in MOS circuitry. In the fabrication of NMOS circuits, the stress properties of a nitride film, such as Si3N4 contact NESL (Nitride Etch Stop Layer), have been used to influence the performance of the NMOS transistors by straining the silicon in the transistor channel. The nitride film is designed to apply appropriate stresses to individual NMOS devices to optimize the performance of each device. A tensile NESL enhances NMOS performance and has a modest impact on PMOS devices.
Silicon Germanium source and drain structures have also been used to introduce a compressive strain to PMOS structures. This enhances the PMOS performance without any impact on NMOS performance. The fabrication of stressed NESL films or specialized source and drain structures adds to the complexity and expense of the circuitry. In addition, as devices are made smaller the reduced size of the stress sources may weaken their effect. As a result, the performance benefits may be reduced or lost.
A silicon film can be grown on top of a silicon-germanium relaxed substrate to apply a stress to the silicon film. The silicon film can be used as an otherwise conventional silicon substrate for a semiconductor chip. The silicon-germanium substrate applies a biaxial tensile stress to the silicon film with the stress penetrating the film to a depth on the order of a few hundred to a few thousand angstroms. Such an approach has not been commercially adopted due to cost, process complexity, and integration challenges associated with this technique.